Performance of a new bus assignment algorithm for an ATM switch fabric

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J. Sánchez
D. Torres
E. Ruiz
M. Guzmán

Abstract

This paper presents the results of the performance evaluation, through analytical and simulation models, of a High Speed Packet Switch with a New Bus Assignment Algorithm, designed and developed at the Research and Advanced Studies Center of National Polytechnic Institute in Guadalajara, México (CINVESTAV-GDL). The analytical model is tested under two different arrival processes: Binomial and Poisson distributions. The simulation model is tested with two bus assignment algorithms: Fixed Start and Rotated Start . The performance parameters considered are: Cell Loss Rate, Delay and Throughput.

 

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How to Cite
Sánchez, J., Torres, D., Ruiz, E., & Guzmán, M. (2004). Performance of a new bus assignment algorithm for an ATM switch fabric. Journal of Applied Research and Technology, 2(02). https://doi.org/10.22201/icat.16656423.2004.2.02.585