Design, at transistor level, of a neuron with axonic delay

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E. Mateos Santillán
J. L. Pérez Silva

Abstract

An electronic neuron designed with only transistors, with the idea of being able to develop to future a VLSI integrated microcircuit is presented. The neuron is of leaky integrator type, with a ramp function with saturation type response and axonic delay. In this work we will present the mathematical model of our neuron, and its electronics main characteristics, as fundamental part of our simulation system, the neural analog computer.

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How to Cite
Mateos Santillán, E., & Pérez Silva, J. L. (2009). Design, at transistor level, of a neuron with axonic delay. Journal of Applied Research and Technology, 7(01). https://doi.org/10.22201/icat.16656423.2009.7.01.507
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