Main Article Content
In recent years, substantial advancements have been made in VLSI technology. With the introduction of CMOL(Cmos\nanowire\MOLecular Hybrid), higher circuit densities are possible. In CMOL there is an additional layer of nanofabricon top of CMOS stack. Nanodevices that lie between overlapping nanowires are programmable and can implement anycombinational logic using a netlist of NOR gates. The limitation on the length of nanowires put a constraint on theconnectivity domain of a circuit. The gates connected to each other must be within a connectivity radius; otherwise an extrabuffer is inserted to connect them. Particle swarm optimization (PSO) has been used in a variety of problems that are NPhard.PSO compared to the other iterative heuristic techniques is simpler to implement. Besides, it delivers comparableresults. In this paper, a hybrid of PSO and simulated annealing (SA) for solving the cell assignment in CMOL, an NP-hardproblem, is proposed. The proposed method takes advantage of the exploration and exploitation factors of PSO and theintrinsic hill climbing feature of SA to reduce the number of buffers to be inserted. Experiments conducted on ISCAS’89benchmark circuits and a comparison with other heuristic techniques, are presented. Results showed that the proposedhybrid algorithm achieved better solution in terms of buffer count in reasonable time.
How to Cite
M. Sait, S., T. Sheikh, A., & H. El-Maleh, A. (2013). Cell Assignment in Hybrid CMOS/Nanodevices Architecture Using a PSO/SA Hybrid Algorithm. Journal of Applied Research and Technology, 11(5). https://doi.org/10.1016/S1665-6423(13)71573-6