SAIT, S. M.; OUGHALI, F. C.; AL-ASLICENTER, M. Design partitioning and layer assignment for 3D integrated circuits usingtabu search and simulated annealing. Journal of Applied Research and Technology, [S. l.], v. 14, n. 1, 2016. DOI: 10.1016/j.jart.2015.11.001. Disponível em: https://jart.icat.unam.mx/index.php/jart/article/view/59. Acesso em: 18 may. 2024.