MATEOS SANTILLÁN, E.; PÉREZ SILVA, J. L. Design, at transistor level, of a neuron with axonic delay. Journal of Applied Research and Technology, [S. l.], v. 7, n. 01, 2009. DOI: 10.22201/icat.16656423.2009.7.01.507. Disponível em: https://jart.icat.unam.mx/index.php/jart/article/view/507. Acesso em: 26 apr. 2024.